The present invention relates to a method for the formation of a planarizing coating film on the surface of a substrate having stepped level differences or, more particularly, to a method for the formation of a planarizing coating film having an excellently flat and smooth surface on a substrate surface having stepped level differences by using a unique coating solution containing a planarizing film-forming organic ingredient.
It is a remarkable trend in the modern technological field of semiconductor devices that the electronic circuit wiring is constructed on the surface of a substrate such as a semiconductor silicon wafer with a higher and higher degree of integration density with an increase in the fineness so that it is sometimes the case that the circuit wiring layer is formed to have a multilayered structure. As a consequence of such a multilayered structure of the circuit wiring layer, the surface of the substrate in an intermediate stage of processing with formation of a multilayered circuit wiring layer or layers cannot be flat enough but has a stepped level difference with raises and recesses on the surface not to be suitable for a further photolithographic patterning work thereon resulting in a great adverse influence on the performance and reliability of the semiconductor device as the final product. It is accordingly an established technique that a photolithographic patterning work on a non-even surface is preceded by the formation of a planarizing coating film having a flat and uniform surface to cover the raised and recessed surface areas.
A great variety of coating solutions are proposed and practically employed in the prior art for the formation of a planarizing coating film. Besides the basic requirements for the planarizing coating solutions that excellent planarization can be obtained therewith by reliably and reproducibly filling up the recesses in the extremely fine circuit wiring patterns with further improved wettability to the fine raises and recesses, a planarizing coating film in recent years is required to satisfy the etching rate condition having adaptability to CVD films as a film also having properties as an etch-back material.
Examples of the coating solutions for the formation of a planarizing coating film under current use include a coating solution of which the film-forming ingredient is a hydrolysis-condensation product of an alkoxysilane compound or a halogenosilane compound as disclosed in Japanese Patent Kokai 5-32410 and a coating solution containing a polymethyl silsesquioxane resin and a tetraalkylammonium compound in an organic solvent as disclosed in Japanese Patent Kokai 8-143818. The former coating solution has problems that the coating film formed therefrom, which is an inorganic silicon oxide film or a so-called inorganic SOG film, is liable to cause crack formation when the coating film has a large aspect ratio in addition to the insufficient filling-up adaptability to very fine circuit wiring patterns. The latter coating solution is also defective in respect of incomplete planarization on a stepped substrate surface consequently with a narrow effective focusing depth latitude in the pattern-wise exposure of a photoresist layer formed on the planarizing coating film to light leading to a decrease in the pattern resolution and also in respect of the uncontrollable variation of the etching rate which heavily depends on the residual amount of the solvent and the conditions of the baking treatment including the baking temperature.
In addition to the above described planarizing coating solutions, polyimide resins are proposed as the film-forming resinous ingredient in a coating solution for planarization. A problem in a polyimide resin-based planarizing coating film is that a baking treatment of the coating film sometimes results in a decrease in the surface planarity of the coating film necessitating a reflow treatment in addition to the problem in the filling-up behavior inhibiting practical application of those resins.